Duale, \Resolving Inconsistencies in EFSMModeled Speci

The US Department of Defense requires that all digi-tal ASIC systems used within the department's branches should be specied in VHDL (Very High Speed Integrated Circuit Hardware Description Language). VHDL speci-cations are typically modeled as Extended Finite-State Machines (EFSMs). Developing ecient algorithms for EFSM models to generate feasible test sequences with acceptable lengths is a challenging task partly because of the inconsistencies among the actions and the con-ditions. Inconsistency detection algorithms for EFSM models have been developed at the earlier stages of this study. As part of realizable test sequence generation for VHDL specications, this paper presents algorithms for the removal of inconsistencies in EFSM models. The proposed method allows the direct application of the FSM-based test generation methods by transforming the EFSM models into equivalent FSMs while avoiding the well-known state explosion problem, where possible. The in-consistency detection and removal algorithms are planned to be applied to the communication protocols used withi