Digital Implementation Of Fpga Based Pwm Generator For Cascade H-Bridge Multilevel Inverter

recently as a very important alternative in the area of high-power medium-voltage energy control due to their low switch voltage stress and modularity. Cascaded H-bridge multi level inverters (CHMLI) are a promising breed of multi level inverters which generally require several independent dc sources. Recently, progress of PLD (Programmable Logic Device) like FPGA or CPLD makes it realize the digital control system of power electronics without microprocessor (CPU or DSP). Complex control algorithm can be implemented into FPGA and the calculation time can be dramatically reduced based on parallel processing hardware circuit. But commercial based controller board for power electronics is mainly designed based on DSP or CPU. In this paper, design concept of original FPGA based controller for Cascaded H-Bridge MLI is proposed. 5-level Cascaded H-bridge multi level inverter is modeled and simulated in MATLAB / SIMULINK environment. The PWM generation scheme is coded in XILINX and the results are presented. Index Terms – Multilevel inverter (MLI), Cascaded H-bridge multilevel inverter(CHMLI), Carrier based pwm, FPG