A 315MHz injection-locked OOK transmitter and a power-gated receiver front-end for wireless ad hoc network are developed in 40nm CMOS. The developed injection-locked frequency multiplier for carrier generation by edge combining achieves 11μW power consumption at 315MHz. The proposed power-gated low noise amplifier with current second-reuse technique achieves the lowest power consumption of 8.4μW with 7.9dB noise figure and 20.5dB gain in state-of-the-art designs
A 400 MHz high efficiency transmitter for wireless medical application is presented in this paper. T...
Silicon CMOS Technology is now the preferred process for low power wireless communication devices, a...
This dissertation focuses on the design of CMOS power amplifiers for modern wireless handsets, where...
A low-power, fully-integrated 40nm-CMOS timing and receiver circuit for wireless sensor networks is ...
Abstract – A 1-Mbps, 315MHz OOK transceiver in 40-nm CMOS for body area networks is developed. Both ...
The development of a novel receiver topology for ultralow-power applications, such as radio-frequenc...
A low-power transceiver architecture that employs multi-phase injection-locked clocking scheme is pr...
This paper explores the general framework and prospects for on-chip and off-chip wireless interconne...
In the previous chapters, the rectifier for an on-chip wireless power receiver is analyzed and the m...
Thesis (Ph.D.), School of Electrical Engineering and Computer Science, Washington State UniversityTh...
University of Minnesota Ph.D. dissertation. June 2016. Major: Electrical/Computer Engineering. Advis...
This paper presents a wideband CMOS power amplifier intended for cellular handset applications. The ...
Abstract The design and analysis of a low‐power multi‐band injection‐locked wireless receiver, imple...
We propose a new transmitter architecture for ultra-low power radios in which the most energy-hungr...
A 400MHz on-off keying transceiver for medical implant applications is presented. The transceiver ac...
A 400 MHz high efficiency transmitter for wireless medical application is presented in this paper. T...
Silicon CMOS Technology is now the preferred process for low power wireless communication devices, a...
This dissertation focuses on the design of CMOS power amplifiers for modern wireless handsets, where...
A low-power, fully-integrated 40nm-CMOS timing and receiver circuit for wireless sensor networks is ...
Abstract – A 1-Mbps, 315MHz OOK transceiver in 40-nm CMOS for body area networks is developed. Both ...
The development of a novel receiver topology for ultralow-power applications, such as radio-frequenc...
A low-power transceiver architecture that employs multi-phase injection-locked clocking scheme is pr...
This paper explores the general framework and prospects for on-chip and off-chip wireless interconne...
In the previous chapters, the rectifier for an on-chip wireless power receiver is analyzed and the m...
Thesis (Ph.D.), School of Electrical Engineering and Computer Science, Washington State UniversityTh...
University of Minnesota Ph.D. dissertation. June 2016. Major: Electrical/Computer Engineering. Advis...
This paper presents a wideband CMOS power amplifier intended for cellular handset applications. The ...
Abstract The design and analysis of a low‐power multi‐band injection‐locked wireless receiver, imple...
We propose a new transmitter architecture for ultra-low power radios in which the most energy-hungr...
A 400MHz on-off keying transceiver for medical implant applications is presented. The transceiver ac...
A 400 MHz high efficiency transmitter for wireless medical application is presented in this paper. T...
Silicon CMOS Technology is now the preferred process for low power wireless communication devices, a...
This dissertation focuses on the design of CMOS power amplifiers for modern wireless handsets, where...