Offset voltage Analysis of Latched Comparator

Comparator is one of the most widely used building block for analog and mixed signal systems. The implementation of dynamic latch comparator provides high speed, less power dissipation, having zero static power consumption and also provides full-swing digital level output voltage in shorter time duration. Back to back inverter in these dynamic comparators provides positive feedback mechanism which converts a smaller voltage difference in full scale digital level output. In this paper, dynamic comparator offset is determined to the extent of high accuracy. In addition to the offset, propagation delay and power dissipation, being the important parameter of the comparator to be analyzed