ANEFFECTIVE PERFORMANCE OFCOMBINATIONAL AND SEQUENTIAL LOGICCELLS USINGCURRENT SOURCE MODELING

Current source model has become a good concern in logic cells. These standard cells must be presented for performing noise and delay analysis. Current source modeling is effectively considered for the traditional static timing analysis. The existing CSMs are only applicable for combinational logic cell. It is possible to handle any input waveform circuit and overcome the noisy inputs such crosstalk induced noisy waveforms. The proposed methods were implementing all logic cells. In this model output waveform can be computed even setup and hold times are violated. CSMs are differing from existing CSMs because of parasitic effects. It is implemented in both DC and AC analysis. Logic cells can take arbitrary shapes inputs like step and ramp signals but ramp signal only applied here. This arbitrary voltage waveforms with near-SPICE accuracy at speeds tens of thousands of times faster than other platform. In this paper described about the circuit parameters simulate in effective spice and determine the noise, time, delay waveforms with SPICE accuracy & it consider incorrect critical path and discontinuous delays during circuit optimization. It considers single dimensional with each iteration. We can able to compute the RMSE values from the SPICE and CSM voltage values. RMSE values calculated from the theoretical value of CSM & practical value of Spice voltage values. The proposed method computes the correct RMSE values from different logical circuits using CSM and compares their results. We can able to choose which circuit is better than other circuits from these circuit parameters measurements. So more number of circuits are possible to tested and we can easily identified logical errors from these circuits. Here applicationaly implemented ECG circuit and analyze these parameters also