This article has been accepted for inclusion in a future issue of this journal. Content is final as presented, with the exception of pagination. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS 1 Analysis and Optimization of Transformer-Based S

Abstract—Transformer-based series power combiners are an-alyzed within the context of reconfigurable, watt-level, wideband digital envelope tracking transmitters. A model is developed for designing and analyzing transformer-based switchable series combiners. This model takes into account losses in the windings and nonideal mutual coupling, as well as the effect of switching and scaling the input amplifiers on the combiner efficiency, input impedance, and power combining ratio. Optimum combining efficiency is derived for a combiner with scaled sources. Based on the developed model, a four-element 29.5-dBm power amplifier with 31 % peak efficiency at 1.9 GHz, using a 1.5-V supply is designed and simulated in IBM 130-nm CMOS technology. The efficiency drops to 14 % at 12 dB power back-off when elements are turned off. The amplifier maintains an output power 25 dBm from 1.8 GHz to 2.5 GHz. The studies presented in this paper can be extended to any series combiner implementation and any frequency range, which can be effective in the design of watt-level power amplifiers in submicrometer CMOS technologies. Index Terms—CMOS technology, digital transmitter archi-tectures, efficiency enhancement, envelope tracking, power amplifiers, series power combining. I