End-to-end error correction and online diagnosis for on-chip networks

Abstract In an on-chip network, roughly 80 % of the communication faults are transient [9]. Different fault tolerance approaches such as Forward Error Control (FEC), Automatic Repeat Query (ARQ), and multi-path routing have been used and compared in literature for reliable on-chip transmission [15-17]. These approaches tolerate transient faults, but they become ineffective in the presence of permanent faults. Permanent faults on wires occur both during manufacturing and in the field, causing yield degradation and service costs respectively. The overall system cost can be reduced by adding some spare wires per each link of the network to replace the defective wires [15,18]. Nevertheless, an in-field diagnosis mechanism is required to locate the defective wire and initiates the wire replacement. We propose a comprehensive solution for end-to-end (e2e) error correction and online defect diagnosis for on-chip networks. For e2e error correction, we propose an interleaved error-locality-aware code that efficiently corrects both random and burst errors. We demonstrate that for 64-bit wide network links, interleaving four of the proposed code, 2G4L(26,16), each of which supports 16-bit data, can correct as many as two random errors or 16 adjacent errors. In order to maintain the error correction capability of the Error Correcting Code (ECC) for transient and intermittent errors, we further propose an e2e data gathering and online diagnosis approach that locates the defective wires and replaces them with the spare wires embedded in the network. Our analytical and experimental studies show that under heavy noise, high escape rate, uncertainty about routing, and many other harmful effects, the diagnostic data collected by the proposed approach are accurate enough for the purpose of passive diagnosis. 1