AckReduction in synchronisation in bundled data systems

dependency problems, the architecture becomes more like a network than a pipeline. This added complexity means that a ‘stage ’ tends to have an increasing number of neighbours with which it must synchronise to communicate. In this environment any particular communication may be infrequent, but unpredictable. In the absence of a synchronising clock messages may be sent in case they will be needed. This paper describes ‘early output logic ’ – a variation of weak conditioned logic [4] – applied to a bundled-data system where a method of reducing the speculative traffic by allowing unwanted inputs to be ‘cancelled ’ before they have sent data. This avoids unnecessary synchronisations between units where the data communication is not needed. 1.2. Asynchronous latches The Muller C-element [5] is one of the basic building blocks of asynchronous circuits. It may have two or more inputs and one output. When all inputs are in the same state the C-element switches state to the same state as the inputs