Compiler-Aided Run-Time Performance Speed-Up in Super-Scalar Processor

In our world, where most systems become embedded systems, the approach of designing embed-ded systems is still frequently similar to the approach of designing organic systems (or not em-bedded systems). An organic system, like a personal computer or a work station, must be able to run any task submitted to it at any time (with certain constrains depending on the machine). Con-sequently, it must have a sophisticated general purpose Operating System (OS) to schedule, dis-patch, maintain and monitor the tasks and assist them in special cases (particularly communica-tion and synchronization between them and with external devices). These OSs require an over-head on the memory, on the cache and on the run time. Moreover, generally they are task oriented rather than machine oriented; therefore the processor's throughput is penalized. On the other hand, an embedded system, like an Anti-lock Braking System (ABS), executes al-ways the same software application. Frequently it is a small or medium size system, or made up of several such systems. Many small or medium size embedded systems, with limited number of tasks, can be scheduled by our proposed hardware architecture, based on the Motorola 500MHz MPC7410 processor, enhancing its throughput and avoiding the software OS overhead, complex-ity, maintenance and price. Encouraged by our experimental results, we shall develop a compiler to assist our method. In the meantime we will present here our proposal and the experimental re-sults