Chip-Multiprocessor Hardware Locks for Safety-Critical Java

Accessing shared resources in multicore systems is usually pro-tected by a software locking mechanism, which itself is imple-mented through atomic operations. This can result in a large syn-chronization overhead, which, in the context of real-time systems, increases the worst-case execution time and may void a task set’s schedulability. In this paper we present a hardware locking mech-anism to reduce the synchronization overhead. The solution is implemented for the chip-multiprocessor version of the Java Op-timized Processor in the context of safety-critical Java. The im-plementation is compared to a software solution. The performance and the hardware cost are evaluated