An Efficient Ripple Carry Adder Based Low Complexity Turbo Decoder

Abstract — The energy efficient ripple carry adder based turbo decoder is required in CDMA2000, WCDMA (UMTS) and HSDPA receivers to decode the data packets between the mobile station and network provided by 4G standard. The high throughput cellular standards 3GPP/4G require an energy efficient decoder architecture. An efficient VLSI architecture for turbo decoder by utilizing state metric calculator is presented here. In decoding, the state metric calculator is inserted to perform state metric calculations. This energy efficient turbo decoder comprises level limiter, error generator, SOVA decoder, state metric calculator, interleaver and corresponding deinterleaver. The ripple carry adder based turbo decoder achieved a low energy consumption o