Automated Fingerprinting of Performance Pathologies Using Performance Monitoring Units (PMUs)

Modern architectures provide access to many hardware performance events, which are capable of providing in-sight into architectural performance bottlenecks through-out the core and memory hierarchy. These events can provide programmers with unique and powerful insights into the causes of performance problems in their pro-grams, but interpreting these events has been a significant challenge. We describe a technique that uses data mining to automatically fingerprint a program’s perfor-mance problems, permitting programmers to reap the architectural insights made possible by the events while shielding them from the onerous task of interpreting raw events. We use a decision tree algorithm on a set of micro-benchmarks to construct a model of performance problems. This extracted model is able to divide a profiled application into program phases, and label the phases with the patterns of hardware bottlenecks. Our framework provides programmers with a detailed map of what to optimize in their code, sparing them the need to interpret raw events.