P o S(TIPP2014)209 Future evolution of the Fast TracKer (FTK)

The Fast Tracker (FTK) processor for the ATLAS experiment has a computing core made of 128 Processing Units that reconstruct tracks in the silicon detector in a 100µsec deep pipeline. The track parameter resolution provided by FTK enables the software-based High Level Trigger (HLT) trigger to efficiently identify and reconstruct significant samples of fermionic Higgs decays and other interesting physics processes. The data processing speed is achieved with custom VLSI pat-tern recognition, linearized track fitting executed inside modern FPGAs, pipelining, and parallel processing. One large FPGA executes full resolution track fitting inside low resolution candidate tracks found by a set of 16 custom ASIC devices, called Associative Memories (AM chips). For future fast tracking applications, the FTK dual structure which is based on the cooperation of VLSI dedicated AM and programmable FPGAs is maintained, but significant performance en-hancements are achieved through miniaturization and tighter integration of the current state of the art prototypes. Those performance enhancements can be of use to new applications within and outside the High Energy Physics field. Specifically, we plan to increase the parallelism by associating one FPGA to each AM chip. The FPGA configures and handles the AM, and provides a flexible computing power to process the patterns selected by the AM. The benefits of using thi