PLL SYNTHESIZERS

A. A frequency synthesizer allows the designer to generate a variety of output frequencies as multiples of a single reference frequency. The main application is in generating local oscillator (LO) signals for the up- and down-conversion of RF signals. The synthesizer works in a phase-locked loop (PLL), where a phase/frequency detector (PFD) compares a fed back frequency with a divided-down version of the reference frequency (Figure 1). The PFD’s output current pulses are fi ltered and integrated to generate a voltage. This voltage drives an external voltage-controlled oscillator (VCO) to increase or decrease the output frequency so as to drive the PFD’s average output towards zero. Frequency is scaled by the use of counters. In the example shown, an ADF4xxx synthesizer is used with an external fi lter and VCO. An input reference (R) counter reduces the referenc