1 Embedded Systems and Applications Group

Abstract. Geometric Algebra (GA), a generalization of quaternions and complex numbers, is a very powerful framework for intuitively ex-pressing and manipulating the complex geometric relationships common to engineering problems. However, actual processing of GA expressions is very compute intensive, and acceleration is generally required for prac-tical use. GPUs and FPGAs offer such acceleration, while requiring only low-power per operation. In this paper, we present key components of a proof-of-concept compile flow combining symbolic and hardware op-timization techniques to automatically generate hardware accelerators from the abstract GA descriptions that are suitable for high-performance embedded computing.