Optimizing Post-silicon Conformance Checking

Abstract—Virtual prototypes of hardware devices, a.k.a, vir-tual devices, are increasingly used to enable early software devel-opment before silicon prototypes/devices are available. In previous work, we presented a post-silicon conformance checking approach to detecting interface state inconsistencies between a silicon device and its virtual device. In this paper, we present an optimization, adaptive concretization, to reduce the overhead incurred by symbolic execution, a key technique used in our conformance checking approach. We have evaluated our optimized approach on three Ethernet adapters and their virtual devices. The results demonstrate that it is effective and efficient: 21 inconsistencies are discovered and time usages are reduced by an order of magnitude, comparing to the previous approach. Keywords—Post-silicon validation; conformance checking; sym-bolic execution; I