Hybrid programming models, such as MPI combined with threads, are one of the most efficient ways to write parallel ap-plications for current machines comprising multi-socket/multi-core nodes and an interconnection network. Global variables in legacy MPI applications, however, present a challenge because they may be accessed by multiple MPI threads simultaneously. Thus, transforming legacy MPI applications to be thread-safe in order to exploit multi-core architectures requires proper handling of global variables. In this paper, we present three approaches to eliminate global variables to ensure thread-safety for an MPI program. These approaches include: (a) a compiler-based refactoring technique, using a Photran-based tool as an example, whi...
Abstract. To make the most effective use of parallel machines that are being built out of increasing...
Proceedings of: First International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2014...
Recently, the microprocessor industry has reached hard physical and micro-architectural limits that ...
Adaptive MPI is an implementation of the Message Pass-ing Interface (MPI) standard. AMPI benefits MP...
MPI-based explicitly parallel programs have been widely used for developing highperformance applicat...
Abstract. Adaptive MPI, or AMPI, is an implementation of the Mes-sage Passing Interface (MPI) standa...
MPI is a message-passing standard widely used for developing high-performance parallel applications....
This paper addresses performance portability of MPI code on multiprogrammed shared memory machines. ...
Many-core architectures, such as the Intel Xeon Phi, provide dozens of cores and hundreds of hardwar...
As high-end computing systems continue to grow in scale, recent advances in multi- and many-core arc...
International audienceScientific applications mainly rely on the MPI parallel programming model to r...
Abstract—With the increasing prominence of many-core archi-tectures and decreasing per-core resource...
International audienceMPI is the most widely used parallel programming model. But the reducing amoun...
Hybrid MPI+Threads programming has emerged as an alternative model to the “MPI everywhere ” model to...
P4 (Portable Programs for Parallel Processors) is a popular message passing system. The Pthreads lib...
Abstract. To make the most effective use of parallel machines that are being built out of increasing...
Proceedings of: First International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2014...
Recently, the microprocessor industry has reached hard physical and micro-architectural limits that ...
Adaptive MPI is an implementation of the Message Pass-ing Interface (MPI) standard. AMPI benefits MP...
MPI-based explicitly parallel programs have been widely used for developing highperformance applicat...
Abstract. Adaptive MPI, or AMPI, is an implementation of the Mes-sage Passing Interface (MPI) standa...
MPI is a message-passing standard widely used for developing high-performance parallel applications....
This paper addresses performance portability of MPI code on multiprogrammed shared memory machines. ...
Many-core architectures, such as the Intel Xeon Phi, provide dozens of cores and hundreds of hardwar...
As high-end computing systems continue to grow in scale, recent advances in multi- and many-core arc...
International audienceScientific applications mainly rely on the MPI parallel programming model to r...
Abstract—With the increasing prominence of many-core archi-tectures and decreasing per-core resource...
International audienceMPI is the most widely used parallel programming model. But the reducing amoun...
Hybrid MPI+Threads programming has emerged as an alternative model to the “MPI everywhere ” model to...
P4 (Portable Programs for Parallel Processors) is a popular message passing system. The Pthreads lib...
Abstract. To make the most effective use of parallel machines that are being built out of increasing...
Proceedings of: First International Workshop on Sustainable Ultrascale Computing Systems (NESUS 2014...
Recently, the microprocessor industry has reached hard physical and micro-architectural limits that ...