Design and Verification of Nine port Network Router

ABSTRACT- The focus of this Paper is the design of Network Router and verifies the functionality of the eight port router for network on chip using verilog qualifies the Design for Synthesis and implementation. This Design consists of Registers, FSM and FIFO’s. This Router design contains Eight output ports and one input port, it is packet based Protocol. Router drives the incoming packet which comes from the input port to output ports based on the address contained in the packet.. The router has an active low synchronous input resetn which resets the router. Thus the idea is borrowed from large scale multiprocessors and wide area network domain and envisions on chip routers based network. This helps to understand how router is controlling the signals from source to destination based on the header adders