To appear in the International Symposium on Microarchitecture Haifa Israel Exploiting ILP in PageBased Intelligent Memory

This study compares the speed area and power of dier ent implementations of Active Pages OCS an intelligent memory system which helps bridge the growing gap between processor and memory performance by associating simple functions with each page of data Previous investigations have shown up to X speedups using a block of recong urable logic to implement these functions next to each sub array on a DRAM chip In this study we show that instructionlevel parallelism not hardware specialization is the key to the previous suc cess with recongurable logic In order to demonstrate this fact an Active Page implementation based upon a simplied VLIW processor was developed Unlike conventional VLI