RCDC: A Relaxed Consistency Deterministic Computer

Providing deterministic execution significantly simplifies the de-bugging, testing, replication, and deployment of multithreaded pro-grams. Recent work has developed deterministic multiprocessor architectures as well as compiler and runtime systems that en-force determinism in current hardware. Such work has incidentally imposed strong memory-ordering properties. Historically, mem-ory ordering has been relaxed in favor of higher performance in shared memory multiprocessors and, interestingly, determinism ex-acerbates the cost of strong memory ordering. Consequently, we argue that relaxed memory ordering is vital to achieving faster de-terministic execution. This paper introduces RCDC, a deterministic multiprocessor architecture that takes advantage of relaxed memory orderings to provide high-performance deterministic execution with low hard