Sequence of 32-Bit Pseudo Random Key for Encryption and Decryption of Text Message

In today‟s world, all the e-commerce transaction happens over the internet. The data that is transferred over the internet needs to be secured before the transmission process happens. The proposed scheme is a FPGA implementation of Park-Miller algorithm for generating sequence of Pseudo-Random keys. The generated pseudo random sequences are comparatively less complex in computation, power efficient and flexible so that it makes the digital circuit faster and smaller. The operation of Park-Miller algorithm to generate pseudo random number uses 32-bit Booth multiplier for multiplication, 32-bit floating point divider for division and a finite state machine for the flow of Park-Miller algorithm operation. After generating a sequence of 32-bit pseudo-random numbers, it is used as a key to encrypt the text message which is known as cipher text. Using the same key to decrypt the encrypted data to get back original text message. The programming is done in Verilog-HDL and MATLAB to verify the result. The design is simulated in Modelsim (version 10.5). The proposed module is successfully synthesized using Cadence RTL compiler. Area and power of the design is computed for 180nm technology. Finally design is implemented on Spartan 6E FPGA