White Paper MOS Device Aging Analysis with HSPICE and CustomSim Authors

In MOS integrated circuits, device aging is mainly due to the degradation of the gate dielectric and of the interface between gate dielectric and silicon over time. Two important mechanisms that contribute to such degradation are the Hot Carrier Injection (HCI) and the Bias Temperature Instability (BTI). These mechanisms are more prominent in advanced process nodes in which the gate oxide is scaled to only a few molecules in equivalent thickness, and with the use of high-K metal-gate transistors. Long and expensive testing is required to assess the degradation of circuit performance and failure in time (aging), thus increasing the overall manufacturing cost. Alternatively, designers use conservative rules to overdesign the critical circuits, increasing the chip cost. Therefore, a cost-effective way to estimate the lifetime of circuits, especially in mission-critical applications (e.g., automotive electronics), is essential. MOS Reliability Analysis (MOSRA) in HSPICE ® and CustomSim offers a robust and economic alternative to empirical overdesign and extensive lifetime testing. With either the built-in model or user-specified aging model, MOSRA accurately predicts the HCI and BTI aging effect on circuit performance. MOSRA enables designers to detect reliability failures early in the design process, significantly reducing the time and cost of lifetime testing. With tight integration with HSPICE and CustomSim, the aging analysis can be performed as fast as the typical transient simulation runs