Abstract—Simulation-based verification is still the most fre-quently used technique when complex designs are to be verified. Stimuli are thereby generated and applied in order to sufficiently trigger and, by this, verify a set of considered scenarios. In gen-eral, a scenario can be triggered in various fashions. To ensure a high verification quality, each of these fashions should adequately be covered. However, to the best of our knowledge, this has not appropriately been addressed thus far, i.e. existing stimuli generation is mainly performed without an explicit consideration of the possible fashions in which a scenario might be triggered. To improve this, three approaches are proposed in this work. While examples illustrate their advantag...
The functional verification process is one of the most expensive steps in integrated circuit manufac...
Simulation continues to be the primary technique for functional validation of designs. It is importa...
ISBN 978-1-4577-0763-6International audienceAssertion-Based Verification (ABV) aims at guaranteeing ...
Abstract—Functional verification of complex designs is still dominated by simulation-based approache...
Simulation-based approaches that require to drive the design under verification (DUV) to specific co...
The Verification Methodology Manual for SystemVerilog (VMM) standard library provides a scenario gen...
Abstract—Verifying if an integrated component is compliant with cer-tain interface protocol is a vit...
Modern Integrated Circuit (IC) design is characterized by a strong trend of Intellectual Property (I...
A pre-condition for any verification technique based on simulation is the generation of a high-quali...
It has been advocated by many experts in design verification that the key to successful verification...
Despite the growing research effort in formal verification, constraint-based random simulation remai...
Due to high performance demand and varied usage requirements from computer systems, the complexity o...
Abstract. Over the last few years, there has been increasing emphasis on integrating ready-made comp...
Despite the increasing research effort in formal verification, constraintbased random simulation rem...
Digital integrated circuits play an important role in the development of new information technologie...
The functional verification process is one of the most expensive steps in integrated circuit manufac...
Simulation continues to be the primary technique for functional validation of designs. It is importa...
ISBN 978-1-4577-0763-6International audienceAssertion-Based Verification (ABV) aims at guaranteeing ...
Abstract—Functional verification of complex designs is still dominated by simulation-based approache...
Simulation-based approaches that require to drive the design under verification (DUV) to specific co...
The Verification Methodology Manual for SystemVerilog (VMM) standard library provides a scenario gen...
Abstract—Verifying if an integrated component is compliant with cer-tain interface protocol is a vit...
Modern Integrated Circuit (IC) design is characterized by a strong trend of Intellectual Property (I...
A pre-condition for any verification technique based on simulation is the generation of a high-quali...
It has been advocated by many experts in design verification that the key to successful verification...
Despite the growing research effort in formal verification, constraint-based random simulation remai...
Due to high performance demand and varied usage requirements from computer systems, the complexity o...
Abstract. Over the last few years, there has been increasing emphasis on integrating ready-made comp...
Despite the increasing research effort in formal verification, constraintbased random simulation rem...
Digital integrated circuits play an important role in the development of new information technologie...
The functional verification process is one of the most expensive steps in integrated circuit manufac...
Simulation continues to be the primary technique for functional validation of designs. It is importa...
ISBN 978-1-4577-0763-6International audienceAssertion-Based Verification (ABV) aims at guaranteeing ...