Applied TCAD in Mega-Bits Memory Design

This paper describes a methodology of TCAD application in VLSI design and development. Simulation-based circuit model parameter generation for chip design purpose is one of the key topics in TCAD. Several critical phenomena, such as CMOS latchup etc., were also analyzed to verify feasibility and perfor-mance of the memory process. Two months of TCAD analysis were required, in which twelve sets of MOS model parameters were generated by VISTA with the computational cost of six hours on six CPUs of SGI-IRIS machines. 1. Basic Data for TCAD Design For submicron devices, the shallow junction formation is one of the essential pro-cesses which determine the device performance. To verify the impurity profile of ion-implanted and annealed diffusion layer, we used SIMS measurement for B, P, and As impurities. Over a hundred samples with various doping conditions have been analyzed. Enhanced diffusion model parameters with annealing temperature and dose have been extracted. Figure 1 shows an example of a Phosphorous im