This article presents an analysis of the reliability of memories protected with Built-in Current Sensors (BICS) and a per-word parity bit when exposed to Single Event Upsets (SEUs). Reliability is characterized by Mean Time to Failure (MTTF) for which two analytic models are proposed. A simple model, similar to the one traditionally used for memories protected with scrubbing, is pro-posed for the low error rate case. A more complex Markov model is proposed for the high error rate case. The accuracy of the models is checked using a wide set of simulations. The results presented in this article allow fast estimation of MTTF enabling design of optimal memory configurations to meet specified MTTF goals at minimum cost. Additionally the power co...
The integration of millions of transistors on a single chip is possible due to rapid scaling of CMOS...
An increasing amount of critical applications use DRAM as main memory in its computing systems. It i...
Chipkill correct is an advanced type of error correction used in memory subsystems. Existing analyti...
This paper presents an analysis of the reliability of memories protected with Built-in Current Senso...
Abstract—The reliability of memory systems that are exposed to soft errors has been studied in the p...
Memories are one of the most widely used elements in electronic systems, and their reliability when ...
In this paper we propose a new Built in Current Sensor (BICS) to detect single event upsets in SRAM....
In this paper we propose a new Built in Current Sensor (BICS) to detect single event upsets in SRAM....
ISBN: 0769522882We propose a new built-in current sensor (BICS) to detect single event upsets (SEUs)...
Complementary Metallic Oxide Semiconductor (CMOS) technology scaling enhances the performance, trans...
International audienceTechnological advances allow the production of increasingly complex electronic...
Due to advance technologies transistor size shrinks which makes the devices more vulnerable to noise...
Ternary content addressable memory (TCAM) is more susceptible to soft errors than static random acce...
Modern nanoscale devices with storage capacity typically implement error correction codes (ECCs) in ...
Multiple bit upsets (MBU) are analyzed from the perspective of the number of accessed blocks (NAB) i...
The integration of millions of transistors on a single chip is possible due to rapid scaling of CMOS...
An increasing amount of critical applications use DRAM as main memory in its computing systems. It i...
Chipkill correct is an advanced type of error correction used in memory subsystems. Existing analyti...
This paper presents an analysis of the reliability of memories protected with Built-in Current Senso...
Abstract—The reliability of memory systems that are exposed to soft errors has been studied in the p...
Memories are one of the most widely used elements in electronic systems, and their reliability when ...
In this paper we propose a new Built in Current Sensor (BICS) to detect single event upsets in SRAM....
In this paper we propose a new Built in Current Sensor (BICS) to detect single event upsets in SRAM....
ISBN: 0769522882We propose a new built-in current sensor (BICS) to detect single event upsets (SEUs)...
Complementary Metallic Oxide Semiconductor (CMOS) technology scaling enhances the performance, trans...
International audienceTechnological advances allow the production of increasingly complex electronic...
Due to advance technologies transistor size shrinks which makes the devices more vulnerable to noise...
Ternary content addressable memory (TCAM) is more susceptible to soft errors than static random acce...
Modern nanoscale devices with storage capacity typically implement error correction codes (ECCs) in ...
Multiple bit upsets (MBU) are analyzed from the perspective of the number of accessed blocks (NAB) i...
The integration of millions of transistors on a single chip is possible due to rapid scaling of CMOS...
An increasing amount of critical applications use DRAM as main memory in its computing systems. It i...
Chipkill correct is an advanced type of error correction used in memory subsystems. Existing analyti...