Power Distribution Analysis of VLSI Interconnects Using Model Order Reduction

Abstract—The analysis and simulation of effects induced by intercon-nects become increasingly important as the scale of process technologies steadily shrinks. While most analyses focus on the timing aspects of inter-connects, power consumption is also important. In this paper, the power distribution analysis of interconnects is studied using a reduced-order model. The relation between power consumption and the poles and residues of a transfer function (either exact or approximated) is derived, and a simple yet accurate driver model is developed, allowing power consumption to be computed efficiently. Application of the proposed method to RC networks is demonstrated using a prototype tool. Index Terms—Interconnect, model order reduction, VLSI. I