Slicing tree is a complete floorplan representation

Slicing tree has been an effective tool for VLSI floorplan de-sign. Floorplanners using slicing tree representation take full advantage of shape and orientation flexibility of circuit modules to find highly compact slicing floorplans. However, slicing floorplans are commonly believed to suffer from poor utilization of space when all modules are hard. For this rea-son, a large body of literature has recently been devoted to various new representations of non-slicing floorplans to im-prove space utilization. In this paper, we prove that by using slicing tree representation and compaction, all maximally compact placements of modules can be generated. In con-clusion, slicing tree is a complete floorplan representation for all non-slicing floorplans as well.