1 Low-Complexity Policies for Energy-Performance Tradeoff in Chip-Multi-Processors

Abstract – Chip-Multi-Processors (CMP) utilize multiple energy-efficient Processing Elements (PEs) to deliver high performance while maintaining an an efficient ratio of performance to energy-consumption. In order to utilize CMP resources, the application software is split into multiple tasks that are executed in parallel on the PEs. Dynamic frequency-Voltage Scaling (DVS) balances performance and energy consumption by dynamically varying a PE's frequency-voltage workpoint in order to save energy while meeting performance requirements. This work addresses DVS policies for CMP. We consider multi-task CMP applications with unknown workloads. We dynamically set frequency-voltage workpoints for each PE in the CMP, attempting to minimize a defined energy-performance criterion. Other DVS methods typically use high complexity optimization techniques, which limits the possibility of real-time implementation in performance-driven, energy-aware systems. In contrast, we investigate simple heuristic DVS policies for simplified serial/parallel task-graphs. We compare the results of our polices to a theoretical best-case solution and show that these lightweight heuristics achieve good results with low complexity. In most cases the simplest policy, named Constant, which usually keeps tasks running at a constant workpoint, is the most cost-effective one