Studies on CMOS Digital-to-Analog Converters

In this thesis we present an overview and study on digital-to-analog converters (DAC), mainly for communications applications. Especially, we look at some digital subscriber line (DSL) specifications and communication over twisted-pair channels. It is pointed out that the required resolution on the DACs in such systems is in the order of 12 to 14 bits of resolution. At the same time the bandwidth stretches from below MHz to several tens of MHz. These figures are the guiding specification throughout the thesis. In this work we consider many of converter architectures and chips. The current-steering DAC is pointed out as a suitable converter for both high speed and high resolution. We also investi-gate the oversampling DAC (OSDAC) and discuss its properties in detail. The performance of the converters is limited by both static and dynamic errors. The static errors are usually caused by mismatch of the components and limit the accuracy at low speed. The static performance is often described by measures of differential and integral nonlineari-ties, (DNL and INL). For communication applications these measures are not especially used for characterization of the DACs. Instead, the dynamic errors, such as settling errors, glitches