Broadband design techniques for transimpedance amplifiers

Abstract—In this paper, a novel bandwidth enhancement tech-nique based on the combination of capacitive degeneration, broad-band matching network, and the regulated cascode (RGC) input stage is proposed and analyzed, which turns the transimpedance amplifier (TIA) design into a fifth-order low-pass filter with Butter-worth response. This broad-band design methodology for TIAs is presented with an example implemented in CHRT 0.18- m 1.8-V RF CMOS technology. Measurement data shows a 3-dB band-width of about 8 GHz with 0.25-pF photodiode capacitance. Com-paring with the core RGC TIA without capacitive degeneration and broad-band matching network, this design achieves an overall bandwidth enhancement ratio of 3.6 with very small gain ripple. The transimpedance gain is 53 dB with a group delay of 80 20 ps. The chip consumes only 13.5-mW dc power and the measured average input-referred noise current spectral density is 18 pA / Hz up to 10 GHz. Index Terms—Bandwidth enhancement, broad-band, matching network, regulated cascode (RGC), transimpedance amplifier (TIA). I