Joseph Wu

In order to achieve the best possible performance, offset and gain can be often be calibrated in high-resolution analog-to-digital converters (ADCs). Changes in temperature, PGA gain, power supply voltage, or most importantly, decimation ratio can influence the accuracy of measurement. This application note explains how the calibration routines work and how to generate values for the full-scale register (FSR) and the offset calibration register (OCR) in the ADS1216, ADS1217, and ADS1218 family of ADCs. These delta-sigma (∆Σ) ADCs rely on five different codes to perform two different types of calibration. First, there are three self-calibration routines: SELFOCAL, SELFGCAL, and SELFCAL. There are also system calibration routines: SYSOCAL and SYSGCAL. Each of these calibrations will have an effect on the FSR, OCR, or both. Delta-sigma ADCs use oversampling as a means to obtain high resolution. These 24-bit, 8-channel components offer precision and a wide dynamic range operating from 2.7V to 5.25V supplies. Internal buffers create high-impedance inputs, allowing for direct connections to transducers or low-level voltage signals