Many micro-electronic systems are based on transceiver architecture, as represented in Fig.1. Traditionally, the test methods are core-based, resulting in long test times and introducing some risks of affecting the signal integrity. In the core-based strategy, every block is tested against its own specifications, whereas path-based testing relies on system-level parameters. This new approach has been developed for some years, and represents a first step towards a full built-in-self-test (BIST) solution, the transmitter and the receiver being path-based tested. However, the test configuration still requires RF signal generation and capture, consequently high-performance instruments, contact blocks, probe cards, and test boards. The next step...
The inherent fault-masking characteristic of the traditional loopback test produces overly pessimist...
Precisely measuring specifications of differential analog and mixed-signal circuits is a difficult p...
International audienceThis paper presents a circuit architecture for a new integrated on chip test m...
The essentials of the on-chip loopback test for integrated RF transceivers are presented. The availa...
International audienceSoftware-defined radio (SDR) development aims for increased speed and flexibil...
The integration capabilities offered by current nanoscale CMOS technologies enable the fabrication o...
The conventional analog and mixed-signal production testing of system-on-a-chip systems provides lim...
textThe growing demand for high performance systems in modern computing technology drives the develo...
Advances toward increased integration and complexity of radio frequency (RF) andmixed-signal integra...
Abstract-- This paper presents an overview of test techniques that offer promising features when Bui...
BIST techniques have been widely explored to create the best performing self-testing architecture. T...
Digital circuit testing is presented in this thesis. This thesis introduces an architecture that acc...
Built-In Self-Test (BIST) is a method of designing and creating an electronic chip or an electronic ...
Test cost comprises a substantial portion of producing an integrated circuit. As a result, structura...
On chip Built In Self Test (BIST) is a cost-effective test methodology for highly complex VLSI devic...
The inherent fault-masking characteristic of the traditional loopback test produces overly pessimist...
Precisely measuring specifications of differential analog and mixed-signal circuits is a difficult p...
International audienceThis paper presents a circuit architecture for a new integrated on chip test m...
The essentials of the on-chip loopback test for integrated RF transceivers are presented. The availa...
International audienceSoftware-defined radio (SDR) development aims for increased speed and flexibil...
The integration capabilities offered by current nanoscale CMOS technologies enable the fabrication o...
The conventional analog and mixed-signal production testing of system-on-a-chip systems provides lim...
textThe growing demand for high performance systems in modern computing technology drives the develo...
Advances toward increased integration and complexity of radio frequency (RF) andmixed-signal integra...
Abstract-- This paper presents an overview of test techniques that offer promising features when Bui...
BIST techniques have been widely explored to create the best performing self-testing architecture. T...
Digital circuit testing is presented in this thesis. This thesis introduces an architecture that acc...
Built-In Self-Test (BIST) is a method of designing and creating an electronic chip or an electronic ...
Test cost comprises a substantial portion of producing an integrated circuit. As a result, structura...
On chip Built In Self Test (BIST) is a cost-effective test methodology for highly complex VLSI devic...
The inherent fault-masking characteristic of the traditional loopback test produces overly pessimist...
Precisely measuring specifications of differential analog and mixed-signal circuits is a difficult p...
International audienceThis paper presents a circuit architecture for a new integrated on chip test m...