BUILT-IN SELF-TEST OF PROGRAMMABLE I/O CELLS IN VIRTEX-4 FPGAS

ABSTRACT: A Built-in Self-test (BIST) approach is presented for testing the programmable I/O cells in Field Programmable Gate Arrays (FPGAs). Using this approach, three BIST architectures and a total of 78 BIST configurations were developed to test the I/O cell logic resources and I/O buffers in all modes of opera-tion in Xilinx Virtex-4 FPGAs. Each BIST configura-tion is valid for both bonded and unbonded I/O buffers such that the BIST approach is package independent. Furthermore, this general BIST approach is applicable to any FPGA or programmable System-on-a-Chip (SoC) with bidirectional I/O buffers. The experimental results, capabilities, and limitations of the BIST approach are also discussed.1 1