The Thompson model for VLSI networks is extended to model buses of varying sizes and physical widths. We consider the problem of minimizing the area for networks which use buses to emulate a complete conununication graph. Exact upper and lower bounds (to within constant factors) are proven for this problem. This results in a general area-size-width trade-off as a Iunction of the number of nodes in the network. Several fundamental techniques are derived for proving lower bounds for networks with buses. Other versions of the problem are studied where either the nodes must be collinear or bus-bus crossings are disallowed. The time for two nodes to conununicate is studied and exact trade-offs are shown for different assumptions about the underl...
This paper uses two different approaches to show that VLSI- and size-optimal discrete neural network...
AbstractIn this paper, we study the global routing problem in VLSI design and the multicast routing ...
AbstractA major component of a large-scale parallel computer is the interconnection network that con...
Preliminary reportThe Thompson model for VLSI networks is extended to model buses of varying sizes a...
AbstractIn bus interconnection networks every bus provides a communication medium between a set of p...
(eng) Gossiping is an information dissemination problem in which each node of a communication networ...
A binary-tree algorithm, Bin(n), proceeds level-by-level from the leaves of a 2n-leaf balanced binar...
Abstract. The bisection width of interconnection networks has always been im-portant in parallel com...
The main benefits of a three-dimensional layout of interconnection networks are the savings in mate...
AbstractThe main benefits of a three-dimensional layout of interconnection networks are the savings ...
The effect of crosstalk avoidance codes on the throughput of fixed width communication channels is s...
Abstmct-VLSI communication networks are wire-limited. The cost of a network is not a function of the...
Abstract.... O An area-uniyersal network is one which can efficiently simulate m other network of co...
A parallel processor network is called n-universal with slowdown s, if it can simulate each computat...
Multiple processor interconnection networks can be characterized as having N\u27 inputs and N\u27 ou...
This paper uses two different approaches to show that VLSI- and size-optimal discrete neural network...
AbstractIn this paper, we study the global routing problem in VLSI design and the multicast routing ...
AbstractA major component of a large-scale parallel computer is the interconnection network that con...
Preliminary reportThe Thompson model for VLSI networks is extended to model buses of varying sizes a...
AbstractIn bus interconnection networks every bus provides a communication medium between a set of p...
(eng) Gossiping is an information dissemination problem in which each node of a communication networ...
A binary-tree algorithm, Bin(n), proceeds level-by-level from the leaves of a 2n-leaf balanced binar...
Abstract. The bisection width of interconnection networks has always been im-portant in parallel com...
The main benefits of a three-dimensional layout of interconnection networks are the savings in mate...
AbstractThe main benefits of a three-dimensional layout of interconnection networks are the savings ...
The effect of crosstalk avoidance codes on the throughput of fixed width communication channels is s...
Abstmct-VLSI communication networks are wire-limited. The cost of a network is not a function of the...
Abstract.... O An area-uniyersal network is one which can efficiently simulate m other network of co...
A parallel processor network is called n-universal with slowdown s, if it can simulate each computat...
Multiple processor interconnection networks can be characterized as having N\u27 inputs and N\u27 ou...
This paper uses two different approaches to show that VLSI- and size-optimal discrete neural network...
AbstractIn this paper, we study the global routing problem in VLSI design and the multicast routing ...
AbstractA major component of a large-scale parallel computer is the interconnection network that con...