Add to ORKGAbstract — We developed an application specific multi-processor generation system intended for real-time applications. In this system, we adopted a dis-tributed memory type multi-processor architecture with hierarchical tree network as a configurable multi-processor which can be adapted to various scale sys-tems flexibly. We have also developed a configurable multi-processor prototype as LSI chips with the 0.18 µm CMOS standard cell technology. I
In this paper, a reconfigurable computing processor core for multimedia system-on-chip (SOC) applica...
Integrating reconfigurable computing hardware into general purpose computers offers promise of perfo...
International audienceA Multi-Processor System-on-Chip (MPSoC) is the key component for complex appl...
This paper focuses on mastering the architecture development of hardware multi-processors for modern...
International audienceIt often happens that designers have to integrate more than one instruction se...
A new high performance computation technique involving multiple processors on a single silicon die i...
Now that system-on-chip technology is emerging, single-chip multi-processors are becoming feasible. ...
Purnaprajna M, Porrmann M, Rückert U. Run-time reconfigurability in embedded multiprocessors. ACM SI...
Abstract—This paper presents a single-chip programmable platform that integrates most of hardware bl...
Building hardware prototypes for computer architecture research is challenging. Unfortunately, devel...
Purnaprajna M, Porrmann M. Run-time Reconfigurable Cluster of Processors. In: Proceedings of 41st A...
This thesis concentrated on the runtime reconfiguration of system-on-chip (SoC) cores to execute spe...
This paper introduces an application mapping methodology and case study for multi-processor on-chip...
Embedded systems are the brains of today’s most digital and industrial control systems. In systems w...
We present a design flow for the generation of application-specific multiprocessor architectures. In...
In this paper, a reconfigurable computing processor core for multimedia system-on-chip (SOC) applica...
Integrating reconfigurable computing hardware into general purpose computers offers promise of perfo...
International audienceA Multi-Processor System-on-Chip (MPSoC) is the key component for complex appl...
This paper focuses on mastering the architecture development of hardware multi-processors for modern...
International audienceIt often happens that designers have to integrate more than one instruction se...
A new high performance computation technique involving multiple processors on a single silicon die i...
Now that system-on-chip technology is emerging, single-chip multi-processors are becoming feasible. ...
Purnaprajna M, Porrmann M, Rückert U. Run-time reconfigurability in embedded multiprocessors. ACM SI...
Abstract—This paper presents a single-chip programmable platform that integrates most of hardware bl...
Building hardware prototypes for computer architecture research is challenging. Unfortunately, devel...
Purnaprajna M, Porrmann M. Run-time Reconfigurable Cluster of Processors. In: Proceedings of 41st A...
This thesis concentrated on the runtime reconfiguration of system-on-chip (SoC) cores to execute spe...
This paper introduces an application mapping methodology and case study for multi-processor on-chip...
Embedded systems are the brains of today’s most digital and industrial control systems. In systems w...
We present a design flow for the generation of application-specific multiprocessor architectures. In...
In this paper, a reconfigurable computing processor core for multimedia system-on-chip (SOC) applica...
Integrating reconfigurable computing hardware into general purpose computers offers promise of perfo...
International audienceA Multi-Processor System-on-Chip (MPSoC) is the key component for complex appl...