ABSTRACT Title of dissertation: THERMAL AND PERFORMANCE MODELING OF NANOSCALE MOSFETS, CARBON NANOTUBE DEVICES AND INTEGRATED CIRCUITS

We offer new paradigms for electronic devices and digital integrated circuits (ICs) in an effort to overcome important performance threatening problems such as self heating. To investigate chip heating, we report novel methods for predicting the thermal profiles of complex ICs at the resolution of a single device. We resolve device and IC temperatures self-consistently, with individual device performances, while accounting for IC layout and software application details. At the device level, we calculate performance and generated heat details. We then extend these perfor-mance figures to the overall chip using a stochastic or Monte Carlo type method-ology. Next, at the IC level, we solve for the device temperatures using the chip’s layout and application software details. Here, we apply our mixed-mode algorithm to two-dimensional (planar) and three-dimensional ICs. To relieve thermal stresses and performance degradation in specific areas of extreme heating or hot spots, we offer design strategies using thermal contacts or different IC layouts. Moreover, we also show chips that we had designed and fabricated through IC fabrication clearing house MOSIS for experimental investigations