Add to ORKGAbstract: We have designed and fabricated a wide range CMOS poly-Si level shifter. The proposed circuit employs 4capacitors and 2clocks (0~3V) to generate level-up signal (3~6V) and level-down signal (-3~0V). The generated level-up signal and the level-down signal make an amplified signal of full range (-3~6V). The power consumption of the level shifter was verified to be very low by SPICE simulation. The operation of fabricated level shifter was proved successfully at the high frequency of 1MHz
© 2018 Elsevier Ltd This paper introduces a very low static current CMOS level up shifter for low vo...
In this paper, we propose a floating high-voltage level shifter without static power consumption whi...
© 2016 Elsevier Ltd This paper presents the design of a single supply CMOS level up shifter for low ...
The design and application of level shifter circuit which is based on single power supply is present...
Modern mobile system-on-a-chip (SoC) requires multi power supply domains. Therefore, in order to red...
As demand of handheld devices like multimedia devices, cellular phones, etc. are increasing and we a...
Abstract — Level shifter is an interfacing circuit which can interface low core voltage to high inpu...
Level shifter circuits are necessary parts of modern SoCs, as they interface different voltage domai...
Abstract — Wide-range level shifters play critical roles in ultralow-voltage circuits and systems. I...
This paper presents a device-circuit co-design approach to achieve a low swing, high speed 1.2-5 V l...
The leakage power consumption increases with the scaling of the devices and it is expected that the ...
A conventional level-shifter is modified to extend the operation range down to subthreshold regime. ...
A single supply CMOS inverter level shifter (ssqc- ls) for upconverting signals from 0.4V-1V logic l...
© 2014 IEEE. This paper proposes some important contributions in the design of a low voltage and low...
Positive-feedback Level Shifter (PLS) logic is proposed in this paper for the design of unipolar dig...
© 2018 Elsevier Ltd This paper introduces a very low static current CMOS level up shifter for low vo...
In this paper, we propose a floating high-voltage level shifter without static power consumption whi...
© 2016 Elsevier Ltd This paper presents the design of a single supply CMOS level up shifter for low ...
The design and application of level shifter circuit which is based on single power supply is present...
Modern mobile system-on-a-chip (SoC) requires multi power supply domains. Therefore, in order to red...
As demand of handheld devices like multimedia devices, cellular phones, etc. are increasing and we a...
Abstract — Level shifter is an interfacing circuit which can interface low core voltage to high inpu...
Level shifter circuits are necessary parts of modern SoCs, as they interface different voltage domai...
Abstract — Wide-range level shifters play critical roles in ultralow-voltage circuits and systems. I...
This paper presents a device-circuit co-design approach to achieve a low swing, high speed 1.2-5 V l...
The leakage power consumption increases with the scaling of the devices and it is expected that the ...
A conventional level-shifter is modified to extend the operation range down to subthreshold regime. ...
A single supply CMOS inverter level shifter (ssqc- ls) for upconverting signals from 0.4V-1V logic l...
© 2014 IEEE. This paper proposes some important contributions in the design of a low voltage and low...
Positive-feedback Level Shifter (PLS) logic is proposed in this paper for the design of unipolar dig...
© 2018 Elsevier Ltd This paper introduces a very low static current CMOS level up shifter for low vo...
In this paper, we propose a floating high-voltage level shifter without static power consumption whi...
© 2016 Elsevier Ltd This paper presents the design of a single supply CMOS level up shifter for low ...