> REPLACE THIS LINE WITH YOUR PAPER IDENTIFICATION NUMBER (DOUBLE-CLICK HERE TO EDIT) <

Abstract--Cryptographic algorithms are important components in secure systems. We propose PAX, a tiny processor for both symmetric-key and public-key ciphers. PAX’s goal is to provide the flexibility of software implementations, with performance comparable to hardware implementations for important ciphers. Based on workload characterization studies, we propose a few powerful instructions that provide huge speedups for critical operations found in many symmetric-key and public-key ciphers. A novel Parallel Table Lookup instruction enables multiple tables to be accessed in parallel by a single instruction; it also combines these parallel table results in a unique combinatorial tree. We achieve a software implementation of AES-128 in just 22 cycles using PAX-128. PAX also has bit and byte permutations, and binary-field arithmetic. Elliptic-Curve Cryptography speedup up to 25x is achieved. A distinctive feature of PAX is wordsize scalability, where the same instruction set can be synthesized into processors with different word-sizes. This is a new dimension in the processor design space, orthogonal to more traditional multi-issue techniques in superscalar or VLIW processors. We show that wordsize scaling provides speedups that are significantly higher with lower implementation complexity, for cryptographic processing. Wordsize scaling can be combined with multi-issue or multi-core scaling for even higher performance