Toward a Systematic-Variation Aware Timing Methodology

Variability of circuit performance is becoming a very im-portant issue for ultra-deep sub-micron technology. Gate length variation has the most direct impact on circuit per-formance. Since many factors contribute to the variability of gate length, recent studies have modeled the variability using Gaussian distributions. In reality, the through-pitch and through-focus variations of gate length are systematic. In this paper, we propose a timing methodology which takes these systematic variations into account and we show that it can reduce the timing uncertainty by up to 40%