D.: Fast estimation of A/D converter nonlinearities

Abstract – This paper deals with an innovative strategy to shorten the record size required to estimate the Integral Non-Linearity (INL) of Analog-to-Digital Converters (ADC’s) through the so-called Sinewave Histogram Test (SHT). Such a size reduction is achieved by low-pass filtering the collected sequences of test samples using a simple moving average filter. After some preliminary simulations, the validity of the proposed approach have been confirmed by some experimental results. I