Technology projections indicate that static power will become a major concern in future generations of high-performance microprocessors. Caches represent a significant percentage of the overall microprocessor die area. Therefore, recent research has concentrated on the reduction of leakage current dissipated by caches. The variety of techniques to control current leakage can be classified as non-state preserving or state preserving. Non-state preserving techniques power off selected cache lines while state preserving place selected lines into a low-power state. Drowsy caches are a recently proposed state-preserving technique. In order to introduce low performance overhead, drowsy caches must be very selective on which cache lines are moved ...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for le...
On-chip L1 and L2 caches dissipate a sizeable fraction of the total power of processors. As feature ...
As feature size shrinks, the dominant component of power consumption will be leakage. As caches repr...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
In the design of embedded systems, especially battery-powered systems, it is important to reduce ene...
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Alth...
Abstract—With the reduction in feature size the static power component, such as the leakage power, d...
Leakage power in cache memories represents a sizable fraction of total power consumption, and many t...
In this paper, a technique to reduce the leakage power consumption in embedded drowsy instruction c...
Power consumption is becoming an increasingly important component of processor design. As technology...
Power consumption in computing today has lead the industry towards energy efficient computing. As tr...
Memory is becoming one of the major power consumers in computing systems. Therefore, energy efficien...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
As technology scales down at an exponential rate, leakage power is fast becoming the dominant compon...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for le...
On-chip L1 and L2 caches dissipate a sizeable fraction of the total power of processors. As feature ...
As feature size shrinks, the dominant component of power consumption will be leakage. As caches repr...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
In the design of embedded systems, especially battery-powered systems, it is important to reduce ene...
On-chip caches represent a sizeable fraction of the total power consumption of microprocessors. Alth...
Abstract—With the reduction in feature size the static power component, such as the leakage power, d...
Leakage power in cache memories represents a sizable fraction of total power consumption, and many t...
In this paper, a technique to reduce the leakage power consumption in embedded drowsy instruction c...
Power consumption is becoming an increasingly important component of processor design. As technology...
Power consumption in computing today has lead the industry towards energy efficient computing. As tr...
Memory is becoming one of the major power consumers in computing systems. Therefore, energy efficien...
Leakage power in data cache memories represents a sizable fraction of total power consumption, and m...
As technology scales down at an exponential rate, leakage power is fast becoming the dominant compon...
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay...
This paper compares the effectiveness of state-preserving and non-state-preserving techniques for le...
On-chip L1 and L2 caches dissipate a sizeable fraction of the total power of processors. As feature ...