Graphics Hardware ON THE DESIGN OF A REAL-TIME VOLUME RENDERING ENGINE

Abstract-An architecture for a Real-Time Volume Rendering Engine (RT-VRE) is given, capable of computing 750 x 750 x 512 samples from a 3D dataset at a rate of 25 images per second. The RT-VRE uses for this purpose 64 dedicated rendering chips, cooperating with 16 RISC-processors. A plane interpola-tor circuit and a composition circuit, both capable to operate at very high speeds, have been designed for a 1.6 micron VLSI process. Both the interpolator and composition circuit are back from production. They have been tested and both complied with our specifications. 1. INTRODUCTION alpha: (~~~~(1. J, K)* ( 1- cw(Z*.Z)) The visualization of high resolution images ac-quired from 3D datasets in real-time is extremely important in every day applications. This is espe-cially true for medical applications where large 3