A new statistical technique for average power estima-tion in sequential circuits is presented. Due to the feed-back mechanism, conventional statistical procedures cannot be applied to infer the average power of sequential circuits. As a remedy, we propose a sequential procedure to deter-mine an independence interval which is used to generate an independent and identically distributed (iid) power sam-ple. A distribution-independent stopping criterion is applied to choose an appropriate convergent sample size. The pro-posed technique is applied to a set of sequential benchmark circuits and demonstrates high accuracy and efficiency. I
Power dissipation in CMOS circuits is heavily dependent on the signal properties of the primary inpu...
We address the problem of optimizing logic-level sequential circuits for low power. We present a pow...
In this paper, we introduce the Pre-corrected FFT (PFFT) algorithm in Statistical Power Analysis of ...
In this paper we present a Monte-Carlo based statistical techniques for estimating power in sequenti...
Recently developed methods for power estimation have primarily focused on combinational logic, We pr...
Abstract — We describe an approach to estimate the average power dissipation in sequential logic cir...
A power estimation approach is presented in which blocks of consecutive vectors are selected at rand...
Abstract – A power estimation approach is presented in which blocks of consecutive vectors are selec...
The problem of estimation of the projected power, consumed by the CMOS sequential circuits, by mean...
We describe an approach to estimate the average power dissipation in sequential logic circuits unde...
In this paper we propose a novel technique based on Markov chains to accurately estimate power sensi...
This thesis will consider two problems in sequential analysis. A new two-stage sampling methodology ...
In power estimation, one is faced with two problems: 1) generating input vector sequences that satis...
this paper we show how user-specified sequences and programs can be modeled using a finite state mac...
71 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1993.Estimating the power dissipate...
Power dissipation in CMOS circuits is heavily dependent on the signal properties of the primary inpu...
We address the problem of optimizing logic-level sequential circuits for low power. We present a pow...
In this paper, we introduce the Pre-corrected FFT (PFFT) algorithm in Statistical Power Analysis of ...
In this paper we present a Monte-Carlo based statistical techniques for estimating power in sequenti...
Recently developed methods for power estimation have primarily focused on combinational logic, We pr...
Abstract — We describe an approach to estimate the average power dissipation in sequential logic cir...
A power estimation approach is presented in which blocks of consecutive vectors are selected at rand...
Abstract – A power estimation approach is presented in which blocks of consecutive vectors are selec...
The problem of estimation of the projected power, consumed by the CMOS sequential circuits, by mean...
We describe an approach to estimate the average power dissipation in sequential logic circuits unde...
In this paper we propose a novel technique based on Markov chains to accurately estimate power sensi...
This thesis will consider two problems in sequential analysis. A new two-stage sampling methodology ...
In power estimation, one is faced with two problems: 1) generating input vector sequences that satis...
this paper we show how user-specified sequences and programs can be modeled using a finite state mac...
71 p.Thesis (Ph.D.)--University of Illinois at Urbana-Champaign, 1993.Estimating the power dissipate...
Power dissipation in CMOS circuits is heavily dependent on the signal properties of the primary inpu...
We address the problem of optimizing logic-level sequential circuits for low power. We present a pow...
In this paper, we introduce the Pre-corrected FFT (PFFT) algorithm in Statistical Power Analysis of ...