Predictive Block Dataflow Model for Parallel Computation

Dataflow architecture as a concept has been around for a long time for parallel computation. In dataflow machines, the hardware is optimized for fine-grain data-driven parallel computation. The architecture can tolerate long unpredictable communication delays and supports generation and coordination of parallelism directly in the hardware. We present a coarse-grained dataflow model of computation for parallel architectures named Predictive Block Dataflow (PBD) due to its predictive capacity and processing of instructions in blocks instead of the fine grain model of one machine instruction. Its based on the dynamic dataflow model but differs in some ways that will be explained in section 4