Modelling and Simulation of a Neuron and a Neuron Network using a Visual HDL

This work used the Summit Visual HDL for VHDL – a Visual Hardware Description package which com-piles flowcharts, state diagrams, truth tables etc into synthesisable VHDL (VHISIC Hardware Description Language). We used this design environment to design and simulate a digital model of a single neuron. This neuron models the superficial input/output characteristics of a biological neuron, producing an ac-tion-potential-like waveform when inputs to the cell sum to reach a pre-determined threshold. It was shown that by connecting a number of these digital neuron models in a network configuration with ap-propriate input weighting, it was possible to emulate the function of a simple feed-forward neural net-work. This finding is important, because previous work has suggested that artificial neurones that are more biological in their function have the potential to form neuron networks that are more robust and noise-tolerant than conventional artificial neural networks