Design of Efficient Reversible Fault Tolerant Carry Skip Adder/Subtractor

Abstract — The reversible logic is a most popular and emerging field in low power consideration. It will be having many applications in quantum computing, nanotechnology and optical computing etc. This proposes the design of efficient fault tolerant carry skip adder/subtractor. Design of carry skip adder/subtractor requires full adder/subtractor and parallel adder/subtractor those designs also included in this paper. In this paper all the designs are efficient in terms of gate count, constant input, garbage output and quantum cost