VLSI implementation of adaptive BIT/serial IIR filters

Graduation date: 1992A new structure for the implementation of bit/serial adaptive IIR filter is\ud presented. The bit level system consists of gated full adders for the arithmetic\ud unit and data latches for the data path. This approach allows recursive\ud operation of the IIR filter to be implemented without any global\ud interconnections, minimal delay time, chip area and I/O pins. The\ud coefficients of the filter can be updated serially in real time for time invariant\ud and adaptive filtering. A fourth order bit/serial IIR filter is implemented on a\ud 2 micron CMOS technology clocked at 55 MHz