Consistent Placement of Macro-Blocks using Floorplanning and Standard-Cell

While a number of recent works address large-scale standard-cell placement, they typically assume that all macros are fixed. Floor-planning techniques are very good at handling macros, but do not scale to hundreds of thousands of placeable objects. Therefore we combine floorplanning techniques with placement techniques in a design flow that solves the more general placement problem. Our work shows how to place macros consistently with large numbers of small standard cells. Our techniques can also be used to guide circuit designers who prefer to place macros by hand. The proposed flow relies on an arbitrary black-box standard-cell placer to obtain an initial placement and then removes pos-sible overlaps using a fixed-outline floorplanner. This results in valid placements for macros, which are considered fixed. Remain-ing standard cells are then placed by another call to the standard-cell placer. Empirical evaluation on ibm benchmarks shows, in most cases, wirelength improvements of 10%-50 % compared to Cadence QPlace, as well as runtime improvements