Abstract—Many designs intermingle large memories with wide data paths and nontrivial control. Verifying such systems is challenging, and users often get little traction when applying model checking to decide full or partial end-to-end correctness of such designs. Interestingly, a subclass of these systems can be proven correct by reasoning only about a small number of the memory entries at a limited number of time points. In this paper, we leverage this fact to abstract certain memories in a sound way, and we demonstrate how our memory abstraction coupled with an abstraction refinement algorithm can be used to prove correctness properties for three challenging designs from industry and academia. Key features of our approach are that we oper...
Model checking techniques applied to large industrial circuits suffer from the state space explosion...
The importance of software verification is still growing due to the increase of safety-critical syst...
To improve efficiency of memory accesses, modern multiprocessor architectures implement a whole rang...
Part 3: VerificationInternational audienceMemory safety plays a crucial role in concurrent hardware/...
Abstract-State-of-the-art hardware model checkers and equivalence checkers rely upon a diversity of ...
Model Checking (MC) on a word-level circuit has important applications in the IC design industry, wh...
The design of state-of-the-art digital circuits often involves interacting state machines with very ...
Temporal logic model checking is one of the most widely used verification techniques. It allows to a...
Perhaps the most difficult aspect of designing a shared memory multiprocessor is the hardware protoc...
With increasing design complexity, verification becomes a more and more important aspect of the desi...
technical reportWe offer a solution to the problem of verifying formal memory models of processors b...
Abstract — Memory is one of the most important components to be optimized in the several phases of t...
This dissertation documents two contributions to automating the formal verification of hardware – pa...
We investigate new techniques for reducing the memory requirements of an on-the-fly model checking t...
textIndustrial designs are becoming more complicated as technology advances and demand for higher p...
Model checking techniques applied to large industrial circuits suffer from the state space explosion...
The importance of software verification is still growing due to the increase of safety-critical syst...
To improve efficiency of memory accesses, modern multiprocessor architectures implement a whole rang...
Part 3: VerificationInternational audienceMemory safety plays a crucial role in concurrent hardware/...
Abstract-State-of-the-art hardware model checkers and equivalence checkers rely upon a diversity of ...
Model Checking (MC) on a word-level circuit has important applications in the IC design industry, wh...
The design of state-of-the-art digital circuits often involves interacting state machines with very ...
Temporal logic model checking is one of the most widely used verification techniques. It allows to a...
Perhaps the most difficult aspect of designing a shared memory multiprocessor is the hardware protoc...
With increasing design complexity, verification becomes a more and more important aspect of the desi...
technical reportWe offer a solution to the problem of verifying formal memory models of processors b...
Abstract — Memory is one of the most important components to be optimized in the several phases of t...
This dissertation documents two contributions to automating the formal verification of hardware – pa...
We investigate new techniques for reducing the memory requirements of an on-the-fly model checking t...
textIndustrial designs are becoming more complicated as technology advances and demand for higher p...
Model checking techniques applied to large industrial circuits suffer from the state space explosion...
The importance of software verification is still growing due to the increase of safety-critical syst...
To improve efficiency of memory accesses, modern multiprocessor architectures implement a whole rang...