Declarative Programming Techniques for Many-Core Architectures

Future manycore architectures are likely to have heterogeneous computing resources which will include conventional CPUs as ZHOO DV YDULDQWV RI WRGD\¶V *38V DQG UHFRQILJXUDEOH ORJLF OLNH FPGAs. Many of the techniques that the reconfigurable computing community has championed will find new applications in mainstream applications. One challenge posed by such manycore architectures is the requirement to target multiple parallel computing resources from a single description (or code). This paper proposes a design methodology for the specification and implementation of data parallel computations that can be mapped to either circuits on FPGAs or pixel-shader code on GPUs from exactly the same description. These descriptions exploit higher order combinators and polymorphism to provide powerful glue for composing data parallel descriptions in a generic way. We present two implementations of these combinations: one in F # which is a variant of the ML functional language and the other in the C # language which uses generics and C # delegates to achieve the effect of higher order combinators. We present the results of implementations that execute on Virtex FPGAs and ATI graphics cards. 1